Static random access memory (SRAM) has been widely used as a representative memory for logic integrated circuits, since SRAM array operates fast as logic circuits operate, and consumes a significantly low power at standby mode. Recent advances in fin field effect transistor (finFET) have made advanced SRAM cells using finFETs possible. However, some of the fin structures in a SRAM array are not continuously extended across the SRAM array, and may be interrupted by isolation structures. As such, a length of oxide diffusion (LOD) effect may be occurred on the transistors adjacent to the isolation structures, and performance of these transistors would be affected.